1. Field of the Invention
The present invention relates to a semiconductor device. More specifically, the present invention relates to a semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor).
2. Description of the Related Art
A semiconductor device such as the IGBT or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) has high speed switching characteristic and a reverse blocking voltage (breakdown voltage) of several tens to several hundreds of volts and is widely used for power conversion and control in a home electric device, a communication device, an on-vehicle motor or the like. To realize downsizing, efficiency improvement and lower power consumption of a power supply system using such a semiconductor device, it is necessary to reduce a resistance during an on-operation and a power loss during turn off of the IGBT or the like included in the system keeping high breakdown voltage. Various configurations are known for reducing an on-resistance and turn-off power loss of the IGBT and reducing a turn-off loss of the IGBT (see, for example, Japanese Patent Application Laid-Open Nos. 2002-43573 and 2004-103982).
During an off-operation of the IGBT, carriers accumulated in an n− base region in a conductive state are emitted. At this time, a collector-emitter voltage rises and a depletion layer extends from a junction interface between a p type base region and the n− type base region, accordingly. If an n+ type buffer region is formed uniformly to have a uniform depth as disclosed in the Japanese Patent Application Laid-Open Nos. 2002-43573 and 2004-103982, the depletion layer extending from the junction interface between the p type base region and the n− type base region reaches an entire surface of the n+ type buffer region simultaneously. At this time, the carriers accumulated in the n− type base region are completely emitted, with the result that supply of a current suddenly stops and noise is disadvantageously generated.